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<div class="header">
  <div class="headertitle"><div class="title">SYSCFG Exported Macros <div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___h_a_l.html">HAL</a> &raquo; <a class="el" href="group___h_a_l___exported___macros.html">HAL Exported Macros</a></div></div></div>
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<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga616c0ad7439136d834bde7b8a09f1483" id="r_ga616c0ad7439136d834bde7b8a09f1483"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga616c0ad7439136d834bde7b8a09f1483">__HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:ga616c0ad7439136d834bde7b8a09f1483"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:ga769a292bedba6880bf86c176171d6779" id="r_ga769a292bedba6880bf86c176171d6779"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga769a292bedba6880bf86c176171d6779">__HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:ga769a292bedba6880bf86c176171d6779"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:ga12296c107679f5f133e1d1583d29f94b" id="r_ga12296c107679f5f133e1d1583d29f94b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga12296c107679f5f133e1d1583d29f94b">__HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:ga12296c107679f5f133e1d1583d29f94b"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:ga38c42933475b0bc006e11dbd6be2bf0f" id="r_ga38c42933475b0bc006e11dbd6be2bf0f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga38c42933475b0bc006e11dbd6be2bf0f">__HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:ga38c42933475b0bc006e11dbd6be2bf0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:gafbe869a5b559936b60104d5ea4fb3a06" id="r_gafbe869a5b559936b60104d5ea4fb3a06"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gafbe869a5b559936b60104d5ea4fb3a06">__HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:gafbe869a5b559936b60104d5ea4fb3a06"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:ga62fcc98e1bc68ef66a77e5c7e4cdee52" id="r_ga62fcc98e1bc68ef66a77e5c7e4cdee52"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga62fcc98e1bc68ef66a77e5c7e4cdee52">__HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:ga62fcc98e1bc68ef66a77e5c7e4cdee52"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:gae01ffb633dfd94927bb9dcec5a0f3632" id="r_gae01ffb633dfd94927bb9dcec5a0f3632"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gae01ffb633dfd94927bb9dcec5a0f3632">__HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:gae01ffb633dfd94927bb9dcec5a0f3632"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:gaf9481d90345878e86cef9c0dbae9615c" id="r_gaf9481d90345878e86cef9c0dbae9615c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gaf9481d90345878e86cef9c0dbae9615c">__HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:gaf9481d90345878e86cef9c0dbae9615c"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:gafab3caecc6a715d033275377215142ea" id="r_gafab3caecc6a715d033275377215142ea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gafab3caecc6a715d033275377215142ea">__HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK</a>()</td></tr>
<tr class="memdesc:gafab3caecc6a715d033275377215142ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:gacfcda24922d87045f660bbd4a482abc4" id="r_gacfcda24922d87045f660bbd4a482abc4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gacfcda24922d87045f660bbd4a482abc4">__HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK</a>()</td></tr>
<tr class="memdesc:gacfcda24922d87045f660bbd4a482abc4"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input.  <br /></td></tr>
<tr class="memitem:gadfaca1cb2ee6df46e27aead12fe01e0c" id="r_gadfaca1cb2ee6df46e27aead12fe01e0c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gadfaca1cb2ee6df46e27aead12fe01e0c">__HAL_SYSCFG_BREAK_PVD_LOCK</a>()</td></tr>
<tr class="memdesc:gadfaca1cb2ee6df46e27aead12fe01e0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register.  <br /></td></tr>
<tr class="memitem:ga61181f4b4955f17858475485f8cd366c" id="r_ga61181f4b4955f17858475485f8cd366c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga61181f4b4955f17858475485f8cd366c">__HAL_SYSCFG_FASTMODEPLUS_ENABLE</a>(__FASTMODEPLUS__)</td></tr>
<tr class="memdesc:ga61181f4b4955f17858475485f8cd366c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fast-mode Plus driving capability enable/disable macros.  <br /></td></tr>
<tr class="memitem:ga5f20cbc8ad78101d527209003dc014f2" id="r_ga5f20cbc8ad78101d527209003dc014f2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ga5f20cbc8ad78101d527209003dc014f2">__HAL_SYSCFG_FASTMODEPLUS_DISABLE</a>(__FASTMODEPLUS__)</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<a name="doc-define-members" id="doc-define-members"></a><h2 id="header-doc-define-members" class="groupheader">Macro Definition Documentation</h2>
<a id="ga616c0ad7439136d834bde7b8a09f1483" name="ga616c0ad7439136d834bde7b8a09f1483"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga616c0ad7439136d834bde7b8a09f1483">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_AXISRAM_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga57279acfc068c3e8ab4e1fe47b0bcd57">SYSCFG_CFGR_AXISRAML</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga57279acfc068c3e8ab4e1fe47b0bcd57"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga57279acfc068c3e8ab4e1fe47b0bcd57">SYSCFG_CFGR_AXISRAML</a></div><div class="ttdeci">#define SYSCFG_CFGR_AXISRAML</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19090</div></div>
</div><!-- fragment -->
<p>SYSCFG Break AXIRAM double ECC lock. Enable and lock the connection of AXIRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

</div>
</div>
<a id="gaf9481d90345878e86cef9c0dbae9615c" name="gaf9481d90345878e86cef9c0dbae9615c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf9481d90345878e86cef9c0dbae9615c">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_BKRAM_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga171746fd5059701bf7475dd7b19a4499">SYSCFG_CFGR_BKRAML</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga171746fd5059701bf7475dd7b19a4499"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga171746fd5059701bf7475dd7b19a4499">SYSCFG_CFGR_BKRAML</a></div><div class="ttdeci">#define SYSCFG_CFGR_BKRAML</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19072</div></div>
</div><!-- fragment -->
<p>SYSCFG Break Backup SRAM double ECC lock. Enable and lock the connection of Backup SRAM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

</div>
</div>
<a id="gafab3caecc6a715d033275377215142ea" name="gafab3caecc6a715d033275377215142ea"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gafab3caecc6a715d033275377215142ea">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_CM7_LOCKUP_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga687d5e366cf578d8c99c0c9a42594a66">SYSCFG_CFGR_CM7L</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga687d5e366cf578d8c99c0c9a42594a66"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga687d5e366cf578d8c99c0c9a42594a66">SYSCFG_CFGR_CM7L</a></div><div class="ttdeci">#define SYSCFG_CFGR_CM7L</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19069</div></div>
</div><!-- fragment -->
<p>SYSCFG Break Cortex-M7 Lockup lock. Enable and lock the connection of Cortex-M7 LOCKUP output to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

</div>
</div>
<a id="ga12296c107679f5f133e1d1583d29f94b" name="ga12296c107679f5f133e1d1583d29f94b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga12296c107679f5f133e1d1583d29f94b">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_DTCM_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga35969855605eecc54ae2e1c6b757b6e0">SYSCFG_CFGR_DTCML</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga35969855605eecc54ae2e1c6b757b6e0"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga35969855605eecc54ae2e1c6b757b6e0">SYSCFG_CFGR_DTCML</a></div><div class="ttdeci">#define SYSCFG_CFGR_DTCML</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19084</div></div>
</div><!-- fragment -->
<p>SYSCFG Break DTCM double ECC lock. Enable and lock the connection of DTCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

</div>
</div>
<a id="gacfcda24922d87045f660bbd4a482abc4" name="gacfcda24922d87045f660bbd4a482abc4"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gacfcda24922d87045f660bbd4a482abc4">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_FLASH_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga941ad57bf7d854c202923dfaef8ba4c3">SYSCFG_CFGR_FLASHL</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga941ad57bf7d854c202923dfaef8ba4c3"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga941ad57bf7d854c202923dfaef8ba4c3">SYSCFG_CFGR_FLASHL</a></div><div class="ttdeci">#define SYSCFG_CFGR_FLASHL</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19066</div></div>
</div><!-- fragment -->
<p>SYSCFG Break FLASH double ECC lock. Enable and lock the connection of Flash double ECC error connection to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

</div>
</div>
<a id="ga769a292bedba6880bf86c176171d6779" name="ga769a292bedba6880bf86c176171d6779"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga769a292bedba6880bf86c176171d6779">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_ITCM_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga80f8e470cde2a18d5e90d8826333db01">SYSCFG_CFGR_ITCML</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga80f8e470cde2a18d5e90d8826333db01"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga80f8e470cde2a18d5e90d8826333db01">SYSCFG_CFGR_ITCML</a></div><div class="ttdeci">#define SYSCFG_CFGR_ITCML</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19087</div></div>
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<p>SYSCFG Break ITCM double ECC lock. Enable and lock the connection of ITCM double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gadfaca1cb2ee6df46e27aead12fe01e0c">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_PVD_LOCK</h2>

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      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_PVD_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
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<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gabe872acc2230f4a9c8c61d0becd4a85b">SYSCFG_CFGR_PVDL</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gabe872acc2230f4a9c8c61d0becd4a85b"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gabe872acc2230f4a9c8c61d0becd4a85b">SYSCFG_CFGR_PVDL</a></div><div class="ttdeci">#define SYSCFG_CFGR_PVDL</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19063</div></div>
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<p>SYSCFG Break PVD lock. Enable and lock the PVD connection to Timer1/8/15/16/17 and HRTIMER Break input, as well as the PVDE and PLS[2:0] in the PWR_CR1 register. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga38c42933475b0bc006e11dbd6be2bf0f">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
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          <td class="memname">#define __HAL_SYSCFG_BREAK_SRAM1_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga9ab30a57911f15034778a70815774d8b">SYSCFG_CFGR_SRAM1L</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga9ab30a57911f15034778a70815774d8b"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga9ab30a57911f15034778a70815774d8b">SYSCFG_CFGR_SRAM1L</a></div><div class="ttdeci">#define SYSCFG_CFGR_SRAM1L</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19081</div></div>
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<p>SYSCFG Break SRAM1 double ECC lock. Enable and lock the connection of SRAM1 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#gafbe869a5b559936b60104d5ea4fb3a06">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_SRAM2_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga93a1e04d5e85ec61347d0bd7cd1dbffb">SYSCFG_CFGR_SRAM2L</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga93a1e04d5e85ec61347d0bd7cd1dbffb"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga93a1e04d5e85ec61347d0bd7cd1dbffb">SYSCFG_CFGR_SRAM2L</a></div><div class="ttdeci">#define SYSCFG_CFGR_SRAM2L</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19078</div></div>
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<p>SYSCFG Break SRAM2 double ECC lock. Enable and lock the connection of SRAM2 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga62fcc98e1bc68ef66a77e5c7e4cdee52">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_SRAM3_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
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<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, SYSCFG_CFGR_SRAM3L)</div>
</div><!-- fragment -->
<p>SYSCFG Break SRAM3 double ECC lock. Enable and lock the connection of SRAM3 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

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<a id="gae01ffb633dfd94927bb9dcec5a0f3632" name="gae01ffb633dfd94927bb9dcec5a0f3632"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gae01ffb633dfd94927bb9dcec5a0f3632">&#9670;&#160;</a></span>__HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define __HAL_SYSCFG_BREAK_SRAM4_DBL_ECC_LOCK</td>
          <td>(</td>
          <td class="paramname"><span class="paramname"><em></em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">SET_BIT(SYSCFG-&gt;CFGR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga060b71d107d9153ac506ed6076fac455">SYSCFG_CFGR_SRAM4L</a>)</div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga060b71d107d9153ac506ed6076fac455"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga060b71d107d9153ac506ed6076fac455">SYSCFG_CFGR_SRAM4L</a></div><div class="ttdeci">#define SYSCFG_CFGR_SRAM4L</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:19075</div></div>
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<p>SYSCFG Break SRAM4 double ECC lock. Enable and lock the connection of SRAM4 double ECC error to TIM1/8/15/16/17 and HRTIMER Break input. </p>
<dl class="section note"><dt>Note</dt><dd>The selected configuration is locked and can be unlocked only by system reset. This feature is available on STM32H7 rev.B and above. </dd></dl>

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<h2 class="memtitle"><span class="permalink"><a href="#ga5f20cbc8ad78101d527209003dc014f2">&#9670;&#160;</a></span>__HAL_SYSCFG_FASTMODEPLUS_DISABLE</h2>

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          <td class="memname">#define __HAL_SYSCFG_FASTMODEPLUS_DISABLE</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__FASTMODEPLUS__</em></span></td><td>)</td>
          <td></td>
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<b>Value:</b><div class="fragment"><div class="line">                                                                <span class="keywordflow">do</span> {<a class="code hl_define" href="stm32h7xx__hal__conf_8h.html#a631dea7b230e600555f979c62af1de21">assert_param</a>(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\</div>
<div class="line">                                                                CLEAR_BIT(SYSCFG-&gt;PMCR, (__FASTMODEPLUS__));\</div>
<div class="line">                                                               }<span class="keywordflow">while</span>(0)</div>
<div class="ttc" id="astm32h7xx__hal__conf_8h_html_a631dea7b230e600555f979c62af1de21"><div class="ttname"><a href="stm32h7xx__hal__conf_8h.html#a631dea7b230e600555f979c62af1de21">assert_param</a></div><div class="ttdeci">#define assert_param(expr)</div><div class="ttdoc">Uncomment the line below to expanse the &quot;assert_param&quot; macro in the HAL drivers code.</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_conf.h:507</div></div>
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<h2 class="memtitle"><span class="permalink"><a href="#ga61181f4b4955f17858475485f8cd366c">&#9670;&#160;</a></span>__HAL_SYSCFG_FASTMODEPLUS_ENABLE</h2>

<div class="memitem">
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      <table class="memname">
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          <td class="memname">#define __HAL_SYSCFG_FASTMODEPLUS_ENABLE</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>__FASTMODEPLUS__</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<b>Value:</b><div class="fragment"><div class="line">                                                                <span class="keywordflow">do</span> {<a class="code hl_define" href="stm32h7xx__hal__conf_8h.html#a631dea7b230e600555f979c62af1de21">assert_param</a>(IS_SYSCFG_FASTMODEPLUS((__FASTMODEPLUS__)));\</div>
<div class="line">                                                                SET_BIT(SYSCFG-&gt;PMCR, (__FASTMODEPLUS__));\</div>
<div class="line">                                                               }<span class="keywordflow">while</span>(0)</div>
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<p>Fast-mode Plus driving capability enable/disable macros. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">__FASTMODEPLUS__</td><td>This parameter can be a value of : <ul>
<li><a class="el" href="group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o.html#ga1f9beaf68b00ae5598cb8d930da05704">SYSCFG_FASTMODEPLUS_PB6</a> Fast-mode Plus driving capability activation on PB6 </li>
<li><a class="el" href="group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o.html#ga4b939ef5ec69e81277ef2323d5917eb5">SYSCFG_FASTMODEPLUS_PB7</a> Fast-mode Plus driving capability activation on PB7 </li>
<li><a class="el" href="group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o.html#ga2cd8442a02f25ed8e7e0ba6e5723edd4">SYSCFG_FASTMODEPLUS_PB8</a> Fast-mode Plus driving capability activation on PB8 </li>
<li><a class="el" href="group___s_y_s_c_f_g___fast_mode_plus___g_p_i_o.html#ga71c50ae2406cd9b6dff73cd9cd189c3d">SYSCFG_FASTMODEPLUS_PB9</a> Fast-mode Plus driving capability activation on PB9 </li>
</ul>
</td></tr>
  </table>
  </dd>
</dl>

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